About This Job

FPGA Design Verification Engineer (Hardware Senior Principal Consultant). ONSITE (OTTAWA)

THIS CONTRACT HAS A TBD START DATE AND GOES FOR 12 MONTHS LATER (GREAT CHANCE OF EXTENSION) LOCATION: ONSITE (THE CLIENT IS IN THE OTTAWA AREA) LANGUAGE: ENGLISH REFERENCES: 2

Essential Requirements:

Proven experience in FPGA design and RTL development. Expertise in NR/LTE/eCPRI/CPRI/PTP protocols and signal processing. Familiarity with JESD204B/C, Ethernet, PCIe, AXI, and high-speed SERDES.

Tools: Quartus, Vivado, MATLAB/Simulink, HDL Coder. Knowledge of UVM and verification methodologies. Strong understanding of 4G/5G Radio architecture and O-RAN ecosystem. Experience with Git/GitHub and version control workflows.

Desirable Skills:

7+ years of FPGA design experience in wireless or high-speed systems. Experience in high-volume wireless products and IP development. Contributions to standards bodies or technical forums (O-RAN, 3GPP).

The scope of work of the Contract includes, but is not limited to:

The FPGA Design Verification Engineer professional will be expected to execute the following tasks during this contract, but not limited to:

Design & Architecture:

Develop FPGA IP architecture for 4G/5G Radio Units Contribute to system-level design aligned with 3GPP and O-RAN Alliance specifications.

Implementation:

Implement complex RTL blocks (Verilog/SystemVerilog/VHDL) and integrate into larger systems. Optimize FPGA resource utilization and ensure timing closure.

Validation & Testing:

Define and execute verification plans using UVM and advanced techniques. Perform simulation and system-level FPGA validation.

Collaboration:

Work closely with Radio Unit development teams for seamless integration. Partner with software teams to ensure hardware-software interoperability. Mentor junior engineers and participate in technical reviews.

Position Name

FPGA Design Verification Engineer (Hardware Senior Principal Consultant)